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Journal of Applied Engineering Science
2019, vol. 17, br. 1, str. 26-34
jezik rada: engleski
vrsta rada: izvorni naučni članak
objavljeno: 04/07/2019
doi: 10.5937/jaes17-18539
Creative Commons License 4.0
One approach to compact testing of digital circuits
(naslov ne postoji na srpskom)
National Research Nuclear University "MEPhI", Institute of Cyber Intelligence Systems, Department of Computer Systems and Technologies, Moscow, Russian Federation



(ne postoji na srpskom)
A problem of signature analyzer synthesis with required properties is solved for digital schemes compact testing. The main attention is devoted to the issues of eliminating losses of diagnostic information and to simplicity of structural organization. Solutions are based on detecting all error vectors or matrices resulting from failures of diagnostics objects related to the postulated class. Any other error vectors or matrices can be non-detectable and are excluded from consideration. For the compact testing of separate units of complex digital systems, the problem of synthesis of the generator structure that reproduces an assigned sequence of binary sets is being solved. Increased attention is given to issues of the non-excessive reproduction of sets sequence and structural organization simplicity. The solution is based on the application of a mathematical tool for linear sequence machines. A software implementation of the mathematical model is proposed. Error vectors or matrix detection process visualization AIDS are given. Additionally, means of the binary sets generation process visualization are presented.

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